Intel Nova Lake-S: Dual Base Tile Focus with APU Featuring Xe3P iGPU and Dedicated Power Phases

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Preview Intel Nova Lake-S: Dual Base Tile Focus with APU Featuring Xe3P iGPU and Dedicated Power Phases

New leaks regarding Intel’s Nova Lake-S processors are surfacing, and the latest information from prominent leakers suggests a refined lineup. Specifically, it appears that some models previously thought to be part of the Dual Base Tile (DBT) configuration will actually be Single Base Tile (SBT) variants. Furthermore, a distinct APU (Accelerated Processing Unit) is emerging, featuring an integrated Xe3P graphics with 12 Xe Cores and two dedicated power phases for graphics.

The key to understanding these leaks lies in distinguishing between the underlying silicon configurations (Base Tiles) and the final commercial SKUs. Base Tiles represent the physical silicon designs, from which various SKUs are derived through binning, core disabling, and TDP adjustments. Previous leaks may have conflated these aspects, and the latest updates aim to clarify the picture.

Initial Intel Nova Lake-S Lineup to Feature Only Two Dual Base Tile SKUs

The initial rollout of Intel Nova Lake-S processors is expected to concentrate on two models based on the Dual Base Tile architecture. These high-end configurations will likely serve as the flagship offerings in the lineup.

The leaks also outline a series of Single Base Tile configurations, suggesting a broad spectrum of performance and price points for the Nova Lake-S family. These SKUs are derived from different Base Tile designs and will offer various core counts and TDPs to cater to diverse user needs.

A significant correction from previous leaks concerns a Core Ultra 9 model with 28 Cores. It was initially believed to be a Dual Base Tile configuration (8 P-Cores + 16 E-Cores + 4 LPE-Cores) with a 125W TDP, codenamed P2D. However, it’s now understood that this specific configuration will be a Single Base Tile, not a Dual Base Tile. The P2D model will, however, incorporate a bLLC (big Last Level Cache).

Intel Prepares a Competitive APU to Challenge AMD

The distinction between a CPU and an APU is becoming increasingly blurred, with integrated graphics performance being a primary differentiator. In this context, leaker Jaykihn has revealed details about a powerful APU based on the Nova Lake-S architecture. This APU is designed to compete directly with AMD’s offerings.

This new APU is expected to feature a configuration of 4 P-Cores + 8 E-Cores + 4 LPE Cores. The standout feature is its integrated GPU, which will utilize the Xe3P architecture, boasting 12 Xe Cores. This Xe3P iteration represents an advancement over previous Intel graphics, incorporating improvements from Battlemage V3 with elements of Celestial architecture.

To support the powerful integrated graphics, Intel has designed this APU with two dedicated VCCGT VRMs. This means that motherboards supporting these APUs will require two dedicated power phases specifically for the graphics component. This dedicated power delivery is a key feature that sets this APU apart and suggests Intel’s commitment to high-performance integrated graphics.

This APU is theorized to be the model featuring the large GPU Tile previously seen in leaked slides. Its introduction signals Intel’s intent to directly challenge upcoming AMD APUs, such as the hypothetical Ryzen 11000G series based on Zen 6 and RDNA 3.5 technology.