A new leak from Kopite, published by MLID, offers significant insights into Intel’s upcoming Nova Lake architecture, potentially reshaping the competitive landscape. The leak reveals a CPU configuration featuring an 8+0+4 core design with bLLC (big Level Cache), a specification that was previously unconfirmed and is poised to be Intel’s direct response to AMD’s Ryzen X3D processors. This design comprises 8 Performance-Cores (P-Cores) without Efficiency-Cores (E-Cores) in the main block, supplemented by 4 Low-Power Efficiency-Cores (LP E-Cores).
This development is crucial because previous indications pointed towards more hybrid solutions, primarily aimed at bolstering performance in benchmarks like Cinebench rather than offering a streamlined gaming-focused alternative. This new leak, however, suggests a fundamental shift. As we speculated two years ago with Arrow Lake-S, this configuration is now expected to be realized in the next architecture.
Intel to Deploy Nova Lake CPU with 8 x P-Cores + 4 x LP E-Cores, Featuring bLLC
This specific configuration is a game-changer. It’s not merely another SKU within Nova Lake; it fundamentally alters the perception of the entire leaked lineup and positions Intel to challenge AMD even before market entry. Previously, Intel’s strategy was believed to involve configurations like 6+12+4 with bLLC as a temporary measure. The rationale behind this was complex, often tied to benchmark performance, particularly Cinebench, which heavily favors thread count. This pushed Intel to maintain configurations with more E-Cores to avoid falling behind in crucial comparative tests that influence reviews and marketing materials.
However, this hybrid approach complicated Intel’s direct competition with Ryzen X3D. It deviated from a simple, understandable formula for gamers seeking a dedicated gaming CPU. E-Cores can sometimes be a hindrance in gaming, necessitating hardware technologies like Thread Director and its subsequent revisions. Therefore, the emergence of an 8+0+4 Nova Lake with bLLC is highly significant. It represents the direct competition we anticipated, albeit arriving later than expected.
Massive Cache, Maximum IPC, Contained Consumption, Long-Term Platform
This configuration aligns perfectly with a more direct response to AMD’s approach. We are looking at 8 P-Cores, 0 E-Cores, and 4 LP E-Cores, coupled with bLLC. This bLLC would be Intel’s key component to enhance gaming performance through increased cache and reduced memory dependencies, facilitated by a less congested ring bus. In essence, this variant embodies a philosophy closer to the X3D approach within Intel’s design principles.
The competitive pressure from AMD is also mounting. If Zen 6 ultimately arrives with 12-Core CCDs, AMD will possess considerable flexibility to configure its models with 10, 8, or 6 Cores, including X3D variants, as needed. This offers AMD strong commercial leverage, as all these models can originate from a homogeneous block of high-performance cores and ample cache.
Intel, conversely, needed to demonstrate its capability to construct a more focused proposal, less reliant on inflating multithreading with E-Cores. This is where the new D2D interconnection system and Tiles come into play. Kopite’s leak points directly in this direction, suggesting that while Intel may retain temporary solutions to maintain strong Cinebench scores, the Nova Lake 8+0+4 with bLLC will be the pivotal component that defines its genuine response to Ryzen X3D for gaming. Moving forward, the battle will not solely be about core counts but about the equilibrium each processor achieves between cache, frequency, IPC, power consumption, temperature, and gaming performance.
